Electronic Transport in Low Temperature Nanocrystalline Silicon Thin-film Transistors Obtained by Hot-wire Cvd

Hydrogenated nanocrystalline silicon obtained by Hot-Wire Chemical Vapour Deposition has been incorporated as the active layer in bottom-gate thin-film transistors. These devices were electrically characterised by measuring in vacuum the output and transfer characteristics for different temperatures. The field-effect mobility showed a thermally activated behaviour which could be attributed to potential barriers for the electronic transport. Trapped charge at the interfaces of the columns, which are typical in hydrogenated nanocrystalline silicon, would account for these barriers. By using the Levinson technique, the trapped charge density at the column boundaries is estimated. Finally, these results are interpreted according to the particular microstructure of this material.